tag:blogger.com,1999:blog-61140136064750684052024-02-07T02:16:09.402-08:00Dar FPGASome FPGA software and hardwareDar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.comBlogger38125tag:blogger.com,1999:blog-6114013606475068405.post-83605692105100441172018-07-07T14:12:00.001-07:002018-07-07T14:12:34.752-07:00Berzerk FPGA game on DE10 liteVHDL source code available at :<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/berzerk">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/berzerk</a><br />
<br />
TV 15kHz and VGA mode available.<br />
Sound fx available.<br />
No speech synthesis atm.<br />
<br />
240kbits internal ram.<br />
<br />
Bring your on roms.Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-45133474326161642532018-06-13T12:29:00.003-07:002018-06-13T12:29:32.629-07:00Vectrex console FPGA game on DE10 lite - updateVectrex VHDL source code updated to rev 0.2 available at :<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/vectrex/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/vectrex/</a><br />
<br />
Synchronise ramp vs blank signals.<br />
Better text position. Clean sweep maze much better, not yet perfect but very playable now.<br />
Every games should get benefit. Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com2tag:blogger.com,1999:blog-6114013606475068405.post-77619680324843501292018-06-06T13:40:00.000-07:002018-06-06T13:40:51.675-07:00Crazy kong (FALCON) FPGA arcade game on DE10 liteCrazy kong VHDL source code available at :<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/crazy_kong/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/crazy_kong/</a><br />
<br />
478kbits internal ram required. <br />
<br />
Bring your own roms.
Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-78685628300530924002018-06-05T12:31:00.000-07:002018-06-05T12:31:53.843-07:00Bagman (STERN - Valadon automation) FPGA arcade game on DE10 liteBagman VHDL source code available at :<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/bagman/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/bagman/</a><br />
<br />
435kbit internal ram required. <br />
<br />
Bring your own roms.Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-84265090456437143942018-06-03T08:44:00.000-07:002018-06-03T08:59:51.172-07:00Crazy climber FPGA arcade game on DE10 liteCrazy climber VHDL source code available at :<br />
<a href="https://www.blogger.com/goog_293877541"><br /></a>
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/crazy_climber/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/crazy_climber/</a><br />
<br />
370kbit internal ram required.<br />
<br />
Bring your own roms.<br />
<br />
Crazy kong (480kbit internal ram) and Bagman coming soon : no more external SRAM required. Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-85372496773786043532018-06-03T08:40:00.002-07:002018-06-03T08:40:38.314-07:00Galaga FPGA arcade game - updateSources updated :<br />
<br />
- Add ship explosion sound (MB88 IC)<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/galaga">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/galaga</a><br />
<br />Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-46332194230437935592018-06-03T08:36:00.000-07:002018-06-03T08:36:38.884-07:00Vectrex console FPGA game on DE10 lite - updateVectrex VHDL source code update at :<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/vectrex/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/vectrex/</a><br />
<br />
Add sp0256-al2 speech synthesis and Speakjet hardware interface.Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-47465709823641054332018-02-10T06:38:00.000-08:002018-02-10T06:38:32.362-08:00Vectrex console FPGA game on DE10 liteVectrex VHDL source code available at :<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/vectrex/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/vectrex/</a><br />
<br />
VGA 640x480@60Hz horizontal/vertical configurations.<br />
<br />
Bring your own rom and cartridge.Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-75051379168351607762018-02-10T06:33:00.001-08:002018-02-10T06:36:49.972-08:00Burger time FPGA arcade game on DE10 liteBurger time VHDL source code available at :<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/burger_time/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/burger_time/</a><br />
<br />
Bring your own rom.Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-26389790996249515992017-12-22T12:25:00.000-08:002017-12-22T12:27:30.157-08:00Burnin' rubber FPGA arcade game on DE10 liteBurnin' rubber VHDL source code available at :<br />
<a href="https://www.blogger.com/goog_1660230908"><br /></a>
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/burnin_rubber/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/burnin_rubber</a><br />
<br />
DE10 lite top level with PS/2 keyboard and PWM sound on GPIO (USB keyboard and SGTL5000 audio out available with additional hardware).<br />
<br />
Just bring your own roms.Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-62391456868114496052017-11-05T02:41:00.000-08:002017-11-05T02:41:51.376-08:00Time pilot FPGA arcade game on DE10_liteTime pilot VHDL source code available at :<br />
<a href="https://www.blogger.com/goog_1002771146"><br /></a>
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/time_pilot">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/time_pilot</a><br />
<br />
DE10_lite top level with PS/2 keyboard input and PWM sound output on GPIO (USB keyboard and SGTL5000 audio out available with additional hardware).<br />
<br />
Bring your own roms.Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-46548632983325479382017-11-04T10:43:00.001-07:002017-11-04T10:44:03.840-07:00Galaga FPGA arcade game - updateSources updated :<br />
<br />
- 2 ships bullets bug fixed.<br />
- DE10_lite top level added.<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/galaga">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/galaga</a><br />
<br />
<br />Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-53076367134779282052017-10-18T12:01:00.000-07:002017-10-18T12:02:24.183-07:00Defender FPGA arcade game - Max10 - de10_liteVideo 15kHz, sound ok, cocktail mode ok.<br />
<br />
VHDL source code available here :<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/defender/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/defender/</a><br />
<br />
<br />Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-15165107899879583792017-06-05T10:23:00.000-07:002017-06-05T10:23:08.310-07:00C64 FPGA64_027 with C1541 sd card read/write sources updateFixed spi controler for SDHC card lba computation. Check release 1.1 (05 June 2017 )Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-17781620936475368992017-05-25T13:58:00.000-07:002017-05-28T11:06:35.006-07:00C64 FPGA64_027 with C1541 sd card read/write sources available FPGA64 + read/write D64 from/to raw SD card for DE10 Lite.<br />
<br />
Tested write operations OK :<br />
<ul>
<li><span style="font-family: "courier new" , "courier" , monospace;">remane file (DOS) : OPEN15,8,15,"R:NEWNAME=OLDNAME"</span></li>
</ul>
<ul>
<li><span style="font-family: "courier new" , "courier" , monospace;">delete file (DOS) : OPEN15,8,15,"S:NAME"</span></li>
</ul>
<ul>
<li><span style="font-family: "courier new" , "courier" , monospace;">copy file (DOS) : OPEN15,8,15,"C:NEWFILE=OLDFILE"</span></li>
</ul>
<ul>
<li><span style="font-family: "courier new" , "courier" , monospace;">save basic program : SAVE"NAME",8</span></li>
</ul>
<br />
<span style="background-color: white;"><span style="color: red;">Don't ever use c1541 NEW (format) command, it is absolutly NOT supported and will lead to data loss.</span></span><br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/C64_and_1541_SD">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/C64_and_1541_SD</a><br />
<br />
<br />
<table align="center" cellpadding="0" cellspacing="0" class="tr-caption-container" style="margin-left: auto; margin-right: auto; text-align: center;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi55NuY3xBAfkJDDmOulYOWIpn8aev-DjwFa0uvYgBKKPQVS2ml8bfI1MtOTPAJmgvxH8LoCKKcAcBJ8mAFbnM8zniJOG-XaRqWwuQOuAxeh16tdgUeOO_PZSaQqxu_K3IOLuD6UBktXr-E/s1600/IMGP4973_cr.jpg" imageanchor="1" style="margin-left: auto; margin-right: auto;"><img border="0" data-original-height="648" data-original-width="1152" height="180" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEi55NuY3xBAfkJDDmOulYOWIpn8aev-DjwFa0uvYgBKKPQVS2ml8bfI1MtOTPAJmgvxH8LoCKKcAcBJ8mAFbnM8zniJOG-XaRqWwuQOuAxeh16tdgUeOO_PZSaQqxu_K3IOLuD6UBktXr-E/s320/IMGP4973_cr.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">Dev. place - PC display / DE10 Lite / TV set</td></tr>
</tbody></table>
<br />
<table align="center" cellpadding="0" cellspacing="0" class="tr-caption-container" style="margin-left: auto; margin-right: auto; text-align: center;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgd2t_GwS7hKB3bbJSxsfExyu0zGQev98oV4mkTYazJNrgR59GFE3aPaXyY6SYTWF-CG0wT0zMhEj75rNnLdU8OwEBJwVHhwHFH3B3vj-Ug6GvkeAqK0tsSqpc5GvPx4eJzViobPGSnis2z/s1600/IMGP4981_cr.jpg" imageanchor="1" style="margin-left: auto; margin-right: auto;"><img border="0" data-original-height="587" data-original-width="1088" height="172" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgd2t_GwS7hKB3bbJSxsfExyu0zGQev98oV4mkTYazJNrgR59GFE3aPaXyY6SYTWF-CG0wT0zMhEj75rNnLdU8OwEBJwVHhwHFH3B3vj-Ug6GvkeAqK0tsSqpc5GvPx4eJzViobPGSnis2z/s320/IMGP4981_cr.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">DE10 Lite + USB host + teensy audio shield (digital audio and micro sd card slot) + SRAM on GPIO<br />
Connexions : USB blaster, audio jack, USB keyboard, video RGB 15KHz to SCART </td></tr>
</tbody></table>
<br />
<br />
<br />
<table align="center" cellpadding="0" cellspacing="0" class="tr-caption-container" style="margin-left: auto; margin-right: auto; text-align: center;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgyBJF1HHashCLzVjkfPwOGWuY6LG0S9RppY_2Uu5-JGTkHhZhFz71kn_oagZny5zOjixlB0yLahqBAYbB7cuvti9dJW7Fgknwg2HeQsltsHYSr5NCgHZfO8ZV5e-WFVdrRmP-pHqu3LZK7/s1600/IMGP4985_cr.jpg" imageanchor="1" style="margin-left: auto; margin-right: auto;"><img border="0" data-original-height="648" data-original-width="1152" height="180" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgyBJF1HHashCLzVjkfPwOGWuY6LG0S9RppY_2Uu5-JGTkHhZhFz71kn_oagZny5zOjixlB0yLahqBAYbB7cuvti9dJW7Fgknwg2HeQsltsHYSr5NCgHZfO8ZV5e-WFVdrRmP-pHqu3LZK7/s320/IMGP4985_cr.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">Impossible Mission</td></tr>
</tbody></table>
<br />Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com1tag:blogger.com,1999:blog-6114013606475068405.post-14358015959051817202017-05-01T13:32:00.001-07:002017-05-01T13:32:40.192-07:00Xevious FPGA arcade game - MAX10 - DE10_lite - updateXevious DE10 Lite update <br />
<br />
Now USB Host for USB keyboard/joystick inputs available using Arduino USB host shield. USB HID report is displayed on 7-Segments display to ease differents joysticks adaptation. Nios processor not used, simple VHDL sequencer.<br />
<br />
Digital audio out available using Teensy audio adapter. I2C config uses VHDL sequencer.<br />
<br />
VHDL source code available here : <a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/xevious/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/xevious/</a><br />
<br />
See other articles below for hardware details. Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-77669645015445278612017-05-01T12:46:00.000-07:002017-05-01T12:46:23.152-07:00Digital audio DAC and SD card on DE10 Lite with Teensy audio shieldTeensy audio shield wired on top of USB Host arduino shield and mounted on DE10 Lite FPGA board. See wiring schematic below. Audio chip SGTL5000 allows to get audio output on headphone plug from FPGA I2S digital format. Line out may be connected by adding header. SD card is also wired. <br />
<br />
<table cellpadding="0" cellspacing="0" class="tr-caption-container" style="float: left; margin-right: 1em; text-align: left;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgQc9vT_oVPX0qEylDzj2720iPc5A7SqMJnSO-cXnDTjsThrpdHr7p8G_K65WhqVs8wYnQClBbpUJRsgDUOVLlqlFxTMgCBjj_ZX8dkh4JBUAKxRjVaPUxziQxkjfMnqsN1maf8ZMxqsGjH/s1600/IMGP4731cr.jpg" imageanchor="1" style="clear: left; margin-bottom: 1em; margin-left: auto; margin-right: auto;"><img alt="" border="0" height="259" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgQc9vT_oVPX0qEylDzj2720iPc5A7SqMJnSO-cXnDTjsThrpdHr7p8G_K65WhqVs8wYnQClBbpUJRsgDUOVLlqlFxTMgCBjj_ZX8dkh4JBUAKxRjVaPUxziQxkjfMnqsN1maf8ZMxqsGjH/s320/IMGP4731cr.jpg" title="" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">USB Host and audio shield on DE10 Lite</td></tr>
</tbody></table>
<br />
<table cellpadding="0" cellspacing="0" class="tr-caption-container" style="float: right; margin-left: 1em; text-align: right;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6pv1_w7x0XF5on0EyHBZtDuVH3W0ZWoTnuZ_k1096o8pp3i26U62JDtMz0_KR0rXuhB4mEPV5JhXnWka_7mXVpRuCJwf1ubjScyv82XZe7xAbUhfRFMAZr7_7Jb9MiT0gXTuabJ8q5Pbx/s1600/IMGP4732cr.jpg" imageanchor="1" style="clear: right; margin-bottom: 1em; margin-left: auto; margin-right: auto;"><img border="0" height="185" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6pv1_w7x0XF5on0EyHBZtDuVH3W0ZWoTnuZ_k1096o8pp3i26U62JDtMz0_KR0rXuhB4mEPV5JhXnWka_7mXVpRuCJwf1ubjScyv82XZe7xAbUhfRFMAZr7_7Jb9MiT0gXTuabJ8q5Pbx/s320/IMGP4732cr.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">USB Host and audio shield on DE10 Lite</td></tr>
</tbody></table>
<br />
<table cellpadding="0" cellspacing="0" class="tr-caption-container" style="float: left; margin-right: 1em; text-align: left;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhtZ9jYVWJ7a1Hfp_2nXGLTycYh3GIaflN2a9cdVesVl_I3jLQYa_x0kHfWhYDlkqT_JfKs54ewnF9khw7hf3p6JzytYG_4x5CEFrWW50x6Odf7aUKN-0XYGoaRBkCQdpcniMfLH44uyZLO/s1600/IMGP4733cr.jpg" imageanchor="1" style="clear: left; margin-bottom: 1em; margin-left: auto; margin-right: auto;"><img border="0" height="190" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhtZ9jYVWJ7a1Hfp_2nXGLTycYh3GIaflN2a9cdVesVl_I3jLQYa_x0kHfWhYDlkqT_JfKs54ewnF9khw7hf3p6JzytYG_4x5CEFrWW50x6Odf7aUKN-0XYGoaRBkCQdpcniMfLH44uyZLO/s320/IMGP4733cr.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">Audio shield on top of USB Host shield <br />(blue female header welded on USB Host PCB) </td></tr>
</tbody></table>
<br />
<table cellpadding="0" cellspacing="0" class="tr-caption-container" style="float: right; margin-left: 1em; text-align: right;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh5AdxlMt876z7LK8NQfNjfCeHzpEkTpj6RsSAILIF6SPK2JLFJRtZiz0Zmu76sg9ySUNehi3T5Ob0GvtPpz8DURgrBOqyuy7oC-yNRDsxsQyOZ0I3KWaIO0Bj7OAxRDO3-jt7UkwQEyF0X/s1600/IMGP4735cr.jpg" imageanchor="1" style="clear: right; margin-bottom: 1em; margin-left: auto; margin-right: auto;"><img border="0" height="233" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh5AdxlMt876z7LK8NQfNjfCeHzpEkTpj6RsSAILIF6SPK2JLFJRtZiz0Zmu76sg9ySUNehi3T5Ob0GvtPpz8DURgrBOqyuy7oC-yNRDsxsQyOZ0I3KWaIO0Bj7OAxRDO3-jt7UkwQEyF0X/s320/IMGP4735cr.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">Audio shield on top of USB Host shield<br />(show 9/10 pins line in/out header holes)</td><td class="tr-caption" style="text-align: center;"> </td><td class="tr-caption" style="text-align: center;"><br /></td><td class="tr-caption" style="text-align: center;"><br /></td><td class="tr-caption" style="text-align: center;"> </td><td class="tr-caption" style="text-align: center;"><br /></td></tr>
</tbody></table>
<br />
<table align="center" cellpadding="0" cellspacing="0" class="tr-caption-container" style="margin-left: auto; margin-right: auto; text-align: center;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg9_fZKN27OEIQib6yAuHeNI9O8e2_20deHxoOMuUp3c0nMDZvoo6X2majRaTgycNpMwDAUBLGsKjybVekCLvDaBY5TypvpXoKWf2xyw4Uy2DqiSjPO1helrjc5D9108iGjVozmW-gJK5Xd/s1600/IMGP4737cr_rot.jpg" imageanchor="1" style="margin-left: auto; margin-right: auto;"><img border="0" height="234" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg9_fZKN27OEIQib6yAuHeNI9O8e2_20deHxoOMuUp3c0nMDZvoo6X2majRaTgycNpMwDAUBLGsKjybVekCLvDaBY5TypvpXoKWf2xyw4Uy2DqiSjPO1helrjc5D9108iGjVozmW-gJK5Xd/s320/IMGP4737cr_rot.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">Wiring of Audio shield : BEWARE First pad column are Max3421e GPIO outputs, NOTHING must be connected there ! </td></tr>
</tbody></table>
<div class="separator" style="clear: both; text-align: center;">
</div>
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<table align="center" cellpadding="0" cellspacing="0" class="tr-caption-container" style="margin-left: auto; margin-right: auto; text-align: center;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiS4A9Z4xkP6jyLaeSUOjseJhoGbwMkr1kaEoxwTlpRlfGsPsCgkq2fUilqqQkopRNaBnxLZQI4YavWissi4EQFWumC_-7rRzZrtSZ2IUb-UgZE7WnX8BQriYgtOo2ym5-Bz6bpat0JBTCV/s1600/USB_host_audio_shield_c.jpg" imageanchor="1" style="margin-left: auto; margin-right: auto;"><img border="0" height="290" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiS4A9Z4xkP6jyLaeSUOjseJhoGbwMkr1kaEoxwTlpRlfGsPsCgkq2fUilqqQkopRNaBnxLZQI4YavWissi4EQFWumC_-7rRzZrtSZ2IUb-UgZE7WnX8BQriYgtOo2ym5-Bz6bpat0JBTCV/s320/USB_host_audio_shield_c.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">Wiring schematic</td></tr>
</tbody></table>
SPI MISO, MOSI and SCLK are shared between USB Host max3421e and SD Card. They have separated chip select (CS-SD and CS-USB). Optional flash memory SPI chip select (CS-MEM) is not wired to FPGA board.<br />
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SGTL5000 config lines use I2C protocol (SDA/SCL). These lines are wired to FPGA board. <br />
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SGTL5000 digital audio I2S interface signals MCLK, LRCLK, BLCK and I2S in (TX) are wired to FPGA board.<br />
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SGTL5000 digital audio I2S out (RX) is not connected to FPGA board. Teensy board VOL pin is not wired.<br />
Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-64891880265829641882017-04-12T13:05:00.000-07:002017-04-12T13:39:46.553-07:00USB host on DE10 Lite with max3421e arduino shield<div style="text-align: left;">
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Arduino USB host shield (sparkfun) on top of DE10 Lite (Terasic). Beware shield has to be modified : see below.</div>
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Example source code with Nios II processor available at : <a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/usb_host">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/usb_host</a></div>
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<table cellpadding="0" cellspacing="0" class="tr-caption-container" style="float: left; margin-right: 1em; text-align: left;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhA3w3t1FgEUu6XS3PqVa_i00dnKO2GoopC-DElFIPteG0lDL-W2_kgLefKL-fmLdm9SZpv-cgDoNZZ5l_WRREdyI4bvg_ClS4SRocpKEBzrDNmwg_7h_MquF3SLDOjgI2AADuennBuC4ys/s1600/IMGP4717cj2.jpg" imageanchor="1" style="clear: left; margin-bottom: 1em; margin-left: auto; margin-right: auto;"><img border="0" height="154" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhA3w3t1FgEUu6XS3PqVa_i00dnKO2GoopC-DElFIPteG0lDL-W2_kgLefKL-fmLdm9SZpv-cgDoNZZ5l_WRREdyI4bvg_ClS4SRocpKEBzrDNmwg_7h_MquF3SLDOjgI2AADuennBuC4ys/s320/IMGP4717cj2.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">Side view (usb dongle plugged in)</td></tr>
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<table cellpadding="0" cellspacing="0" class="tr-caption-container" style="float: right; margin-left: 1em; text-align: right;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhodfT6e78La6nS_dbB6qgwAwUGKUl8DDOkvIf5At-x2vOK7FkisipMVyLihM-TNGZcQLALk7q7aW4EyV358cMlD-LrXASs96SQDn-RHHe3PVel2tOX7CAj7ZYzhTqUqnXyvSoLevchp-kB/s1600/IMGP4719cj2.jpg" imageanchor="1" style="clear: right; margin-bottom: 1em; margin-left: auto; margin-right: auto;"><img border="0" height="242" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhodfT6e78La6nS_dbB6qgwAwUGKUl8DDOkvIf5At-x2vOK7FkisipMVyLihM-TNGZcQLALk7q7aW4EyV358cMlD-LrXASs96SQDn-RHHe3PVel2tOX7CAj7ZYzhTqUqnXyvSoLevchp-kB/s320/IMGP4719cj2.jpg" width="320" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">Top view</td><td class="tr-caption" style="text-align: center;"><br /></td><td class="tr-caption" style="text-align: center;"><br /></td><td class="tr-caption" style="text-align: center;"><br /></td><td class="tr-caption" style="text-align: center;"><br /></td></tr>
</tbody></table>
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6fX4UcYx9kXGi4wkJEfFLUCg-vkyXlLZWASNqFpq96a_WP1NBnexSVKITBmbvb-YmdoEaRYMLym3PWI2T1a4N6zN6mo_N1l7EWMkHPEmAv7CvcVVk45PBwCYA1cqCvo8HaBwSpJoaL7Mx/s1600/IMGP4721c3j2.jpg" imageanchor="1" style="clear: left; float: left; margin-bottom: 1em; margin-right: 1em;"></a><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6fX4UcYx9kXGi4wkJEfFLUCg-vkyXlLZWASNqFpq96a_WP1NBnexSVKITBmbvb-YmdoEaRYMLym3PWI2T1a4N6zN6mo_N1l7EWMkHPEmAv7CvcVVk45PBwCYA1cqCvo8HaBwSpJoaL7Mx/s1600/IMGP4721c3j2.jpg" imageanchor="1" style="clear: left; float: left; margin-bottom: 1em; margin-right: 1em;"></a><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6fX4UcYx9kXGi4wkJEfFLUCg-vkyXlLZWASNqFpq96a_WP1NBnexSVKITBmbvb-YmdoEaRYMLym3PWI2T1a4N6zN6mo_N1l7EWMkHPEmAv7CvcVVk45PBwCYA1cqCvo8HaBwSpJoaL7Mx/s1600/IMGP4721c3j2.jpg" imageanchor="1" style="clear: left; float: left; margin-bottom: 1em; margin-right: 1em;"></a><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6fX4UcYx9kXGi4wkJEfFLUCg-vkyXlLZWASNqFpq96a_WP1NBnexSVKITBmbvb-YmdoEaRYMLym3PWI2T1a4N6zN6mo_N1l7EWMkHPEmAv7CvcVVk45PBwCYA1cqCvo8HaBwSpJoaL7Mx/s1600/IMGP4721c3j2.jpg" imageanchor="1" style="clear: left; float: left; margin-bottom: 1em; margin-right: 1em;"></a><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6fX4UcYx9kXGi4wkJEfFLUCg-vkyXlLZWASNqFpq96a_WP1NBnexSVKITBmbvb-YmdoEaRYMLym3PWI2T1a4N6zN6mo_N1l7EWMkHPEmAv7CvcVVk45PBwCYA1cqCvo8HaBwSpJoaL7Mx/s1600/IMGP4721c3j2.jpg" imageanchor="1" style="clear: left; float: left; margin-bottom: 1em; margin-right: 1em;"> </a><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6fX4UcYx9kXGi4wkJEfFLUCg-vkyXlLZWASNqFpq96a_WP1NBnexSVKITBmbvb-YmdoEaRYMLym3PWI2T1a4N6zN6mo_N1l7EWMkHPEmAv7CvcVVk45PBwCYA1cqCvo8HaBwSpJoaL7Mx/s1600/IMGP4721c3j2.jpg" imageanchor="1" style="clear: left; float: left; margin-bottom: 1em; margin-right: 1em;"> </a></div>
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Vin from DE10 board is 5V. LD1117 voltage regulator has to be
bypassed. Blue rectangle shows this bypass : additional white wire.<br />
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ON/OFF switch has to be kept on OFF position. Green circle shows switch position.<br />
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<table align="center" cellpadding="0" cellspacing="0" class="tr-caption-container" style="margin-left: auto; margin-right: auto; text-align: center;"><tbody>
<tr><td style="text-align: center;"><a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6fX4UcYx9kXGi4wkJEfFLUCg-vkyXlLZWASNqFpq96a_WP1NBnexSVKITBmbvb-YmdoEaRYMLym3PWI2T1a4N6zN6mo_N1l7EWMkHPEmAv7CvcVVk45PBwCYA1cqCvo8HaBwSpJoaL7Mx/s1600/IMGP4721c3j2.jpg" imageanchor="1" style="clear: left; margin-bottom: 1em; margin-left: auto; margin-right: auto;"><img border="0" height="320" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEh6fX4UcYx9kXGi4wkJEfFLUCg-vkyXlLZWASNqFpq96a_WP1NBnexSVKITBmbvb-YmdoEaRYMLym3PWI2T1a4N6zN6mo_N1l7EWMkHPEmAv7CvcVVk45PBwCYA1cqCvo8HaBwSpJoaL7Mx/s320/IMGP4721c3j2.jpg" width="300" /></a></td></tr>
<tr><td class="tr-caption" style="text-align: center;">Modified shield</td></tr>
</tbody></table>
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<br />Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-12039879051222585522017-03-09T12:50:00.003-08:002017-03-09T12:53:12.365-08:00Xevious FPGA arcade game - MAX10 - DE10_lite - updateNow video tested Ok (15KHz signal to TV set SCART)<br />
NO external RAM required.<br />
Keyboard and sound output not tested yet (required external hardware on GPIO)Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-39979207316072612512017-03-05T08:08:00.001-08:002017-03-05T08:08:39.858-08:00Xevious FPGA arcade game - MAX10 - DE10_liteExperimental version for MAX10 FPGA - DE10_lite board, not tested at all (no board available).<br />
No external SRAM required. Be careful with gpio connection, must use voltage translator or limiting diodes to avoid board damages.Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-60252743372321129242017-02-15T13:03:00.001-08:002017-02-15T13:08:08.045-08:00Xevious FPGA arcade game on DE2-35 - updateNow with ship explosion, fujitsu mb88 microprocessor emulatedDar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-24637185105322825262017-01-29T09:23:00.000-08:002017-02-15T13:06:42.636-08:00Xevious FPGA arcade game on DE2-35Xevious VHDL source code available at <a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/xevious">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/xevious</a><br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjK29fZDPpaChxG1xKHkFUfs5BB_3Jj7TG3vLpHJKi0DIO4CRF1qaomMeVT-6E4__gulwSpyFtEZJ42L1yzjlDAc6S7EiK5CeWwfE2l2KQi9z60rSUrWWfhGwkStU_5by5CGwizPpJgPlNM/s1600/xevious.png" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjK29fZDPpaChxG1xKHkFUfs5BB_3Jj7TG3vLpHJKi0DIO4CRF1qaomMeVT-6E4__gulwSpyFtEZJ42L1yzjlDAc6S7EiK5CeWwfE2l2KQi9z60rSUrWWfhGwkStU_5by5CGwizPpJgPlNM/s1600/xevious.png" /></a></div>
<br />
PS/2 keyboard, 15kHz TV mode (only) with sound <strike>but no ship explosion</strike> ship explosion ok since 15-02-2017<strike><br /></strike><br />
Just add your own roms.
Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0tag:blogger.com,1999:blog-6114013606475068405.post-80694249373458002202016-12-29T07:37:00.001-08:002016-12-29T07:37:48.427-08:00Galaga FPGA arcade game on DE2-35Galaga (Namco/Midway) VHDL source code available at <a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/galaga">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/galaga</a><br />
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<br />
PS/2 keyboard, 15kHz TV mode (only) with sound but no ship explosion<br />
Just add your own roms.Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com1tag:blogger.com,1999:blog-6114013606475068405.post-80023784848512270632016-04-18T12:38:00.000-07:002016-04-18T12:38:18.569-07:00Phoenix FPGA arcade game on DE2-35<div class="separator" style="clear: both; text-align: center;">
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Phoenix (Amstar ) VHDL source code available at <a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL/phoenix/">https://sourceforge.net/projects/darfpga/files/Software%20VHDL/phoenix</a> <br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhjeH4wOgHFBChAuDWW1kDXbSBI_4JyMFGHWWeAvCEvXHJmIK2qBtvjxsCtgR3vjHpLrSpNFkMyca5zJfAfgBQE2oGR5bkEkLOpCPgAR_JsXQj6gpfRnu7uaOGHTQ3lbjwc77evwIFscXNz/s1600/snapshot1.PNG" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhjeH4wOgHFBChAuDWW1kDXbSBI_4JyMFGHWWeAvCEvXHJmIK2qBtvjxsCtgR3vjHpLrSpNFkMyca5zJfAfgBQE2oGR5bkEkLOpCPgAR_JsXQj6gpfRnu7uaOGHTQ3lbjwc77evwIFscXNz/s400/snapshot1.PNG" /></a></div>
<br />
<br />
PS/2 keyboard, 15kHz TV mode (only), with sound effects and melodies<br />
(Just add your own ROMs)<br />
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<br />
Many many explanations about hardware and software stuff. Analog sound effects part analysis fully described with exclusive schematics and computations (NE555 oscillator, charging/discharging capacitor, noise generator). <br />
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<a href="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj6auyualpqzkaBNHUHRZ-lNSTsPuovYrCc91ezB6QnUoMzJ-jOYZbPqGETfw90ZpKW6ACSp_vkzvJmUGAwc1PjLvhX8DnLiPdzgOOo1RbeUwQUwF_E5ieuLb1DTp63wF7lEr7AeNKkRsog/s1600/snapshot.PNG" imageanchor="1" style="margin-left: 1em; margin-right: 1em;"><img border="0" height="191" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj6auyualpqzkaBNHUHRZ-lNSTsPuovYrCc91ezB6QnUoMzJ-jOYZbPqGETfw90ZpKW6ACSp_vkzvJmUGAwc1PjLvhX8DnLiPdzgOOo1RbeUwQUwF_E5ieuLb1DTp63wF7lEr7AeNKkRsog/s320/snapshot.PNG" width="320" /></a></div>
Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com1tag:blogger.com,1999:blog-6114013606475068405.post-7336781233876988052015-05-06T01:35:00.000-07:002015-05-06T23:29:54.988-07:00FPGA64_027 with C1541_SD sources available FPGA64 + read D64 from raw SD card (READ ONLY) + external IEC bus with DE0 nano or DE2<br />
FPGA64 + external IEC bus with DE1<br />
<br />
<a href="https://sourceforge.net/projects/darfpga/files/Software%20VHDL">https://sourceforge.net/projects/darfpga/files/Software%20VHDL</a>Dar FPGAhttp://www.blogger.com/profile/13152673169319783146noreply@blogger.com0