Berzerk FPGA game on DE10 lite

VHDL source code available at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/berzerk

 TV 15kHz and VGA mode available.
Sound fx available.
No speech synthesis atm.

240kbits internal ram.

Bring your on roms.

Vectrex console FPGA game on DE10 lite - update

Vectrex VHDL source code updated to rev 0.2 available at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/vectrex/

Synchronise ramp vs blank signals.
Better text position. Clean sweep maze much better, not yet perfect but very playable now.
Every games should get benefit. 

Crazy kong (FALCON) FPGA arcade game on DE10 lite

Crazy kong VHDL source code available at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/crazy_kong/

478kbits internal ram required.

Bring your own roms.

Bagman (STERN - Valadon automation) FPGA arcade game on DE10 lite

Bagman VHDL source code available at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/bagman/

435kbit internal ram required.

Bring your own roms.

Crazy climber FPGA arcade game on DE10 lite

Crazy climber VHDL source code available at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/crazy_climber/

370kbit internal ram required.

Bring your own roms.

Crazy kong (480kbit internal ram) and Bagman coming soon : no more external SRAM required.  

Galaga FPGA arcade game - update

Sources updated :

- Add ship explosion sound (MB88 IC)

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/galaga

Vectrex console FPGA game on DE10 lite - update

Vectrex VHDL source code update at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/vectrex/

Add sp0256-al2 speech synthesis and Speakjet hardware interface.

Vectrex console FPGA game on DE10 lite

Vectrex VHDL source code available at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/vectrex/

VGA 640x480@60Hz horizontal/vertical configurations.

Bring your own rom and cartridge.

Burger time FPGA arcade game on DE10 lite

Burger time VHDL source code available at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/burger_time/

Bring your own rom.

Burnin' rubber FPGA arcade game on DE10 lite

Burnin' rubber VHDL source code available at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/burnin_rubber

DE10 lite top level with PS/2 keyboard and PWM sound on GPIO (USB keyboard and SGTL5000 audio out available with additional hardware).

Just bring your own roms.

Time pilot FPGA arcade game on DE10_lite

Time pilot VHDL source code available at :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/time_pilot

DE10_lite top level with PS/2 keyboard input and PWM sound output on GPIO (USB keyboard and SGTL5000 audio out available with additional hardware).

Bring your own roms.

Galaga FPGA arcade game - update

Sources updated :

  - 2 ships bullets bug fixed.
  - DE10_lite top level added.

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/galaga

Defender FPGA arcade game - Max10 - de10_lite

Video 15kHz, sound ok, cocktail mode ok.

VHDL source code available here :

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/defender/

C64 FPGA64_027 with C1541 sd card read/write sources update

Fixed spi controler for SDHC card lba computation. Check release 1.1 (05 June 2017 )

C64 FPGA64_027 with C1541 sd card read/write sources available

FPGA64 + read/write D64 from/to raw SD card for DE10 Lite.

Tested write operations OK :

• remane file (DOS)  : OPEN15,8,15,"R:NEWNAME=OLDNAME"

• delete file (DOS)  : OPEN15,8,15,"S:NAME"

• copy   file (DOS)  : OPEN15,8,15,"C:NEWFILE=OLDFILE"

• save basic program : SAVE"NAME",8

Don't ever use c1541 NEW (format) command, it is absolutly NOT supported and will lead to data loss.

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/C64_and_1541_SD

Dev. place - PC display / DE10 Lite / TV set

DE10 Lite + USB host + teensy audio shield (digital audio and micro sd card slot) + SRAM on GPIO
Connexions : USB blaster, audio jack, USB keyboard, video RGB 15KHz to SCART

Impossible Mission

Xevious FPGA arcade game - MAX10 - DE10_lite - update

Xevious DE10 Lite update 

Now USB Host for USB keyboard/joystick inputs available using Arduino USB host shield. USB HID report is displayed on 7-Segments display to ease differents joysticks adaptation. Nios processor not used, simple VHDL sequencer.

Digital audio out available using Teensy audio adapter. I2C config uses VHDL sequencer.

VHDL source code available here : https://sourceforge.net/projects/darfpga/files/Software%20VHDL/xevious/

See other articles below for hardware details.

Digital audio DAC and SD card on DE10 Lite with Teensy audio shield

Teensy audio shield wired on top of USB Host arduino shield and mounted on DE10 Lite FPGA board. See wiring schematic below. Audio chip SGTL5000 allows to get audio output on headphone plug from FPGA I2S digital format. Line out may be connected by adding header. SD card is also wired.  

USB Host and audio shield on DE10 Lite

USB Host and audio shield on DE10 Lite

Audio shield on top of USB Host shield
(blue female header welded on USB Host PCB)

Audio shield on top of USB Host shield
(show 9/10 pins line in/out header holes)

 

 

Wiring of Audio shield : BEWARE First pad column are Max3421e GPIO outputs, NOTHING must be connected there !

Wiring schematic

SPI MISO, MOSI and SCLK are shared between USB Host max3421e and SD Card. They have separated chip select (CS-SD and CS-USB). Optional flash memory SPI chip select (CS-MEM) is not wired to FPGA board.

SGTL5000 config lines use I2C protocol (SDA/SCL). These lines are wired to FPGA board.

SGTL5000 digital audio I2S interface signals MCLK, LRCLK, BLCK and I2S in (TX) are wired to FPGA board.

SGTL5000 digital audio I2S out (RX) is not connected to FPGA board. Teensy board VOL pin is not wired.

USB host on DE10 Lite with max3421e arduino shield

Arduino USB host shield (sparkfun) on top of DE10 Lite (Terasic). Beware shield has to be modified : see below.

Example source code with Nios II processor available at :  https://sourceforge.net/projects/darfpga/files/Software%20VHDL/usb_host

Side view (usb dongle plugged in)

Top view

  

Vin from DE10 board is 5V. LD1117 voltage regulator has to be bypassed. Blue rectangle shows this bypass : additional white wire.

ON/OFF switch has to be kept on OFF position. Green circle shows switch position.

Modified shield

Xevious FPGA arcade game - MAX10 - DE10_lite - update

Now video tested Ok (15KHz signal to TV set SCART)
NO external RAM required.
Keyboard and sound output not tested yet (required external hardware on GPIO)

Xevious FPGA arcade game - MAX10 - DE10_lite

Experimental version for MAX10 FPGA - DE10_lite board, not tested at all (no board available).
No external SRAM required. Be careful with gpio connection, must use voltage translator or limiting diodes to avoid board damages.