C64 FPGA64_027 with C1541 sd card read/write sources available

FPGA64 + read/write D64 from/to raw SD card for DE10 Lite.

Tested write operations OK :

• remane file (DOS)  : OPEN15,8,15,"R:NEWNAME=OLDNAME"

• delete file (DOS)  : OPEN15,8,15,"S:NAME"

• copy   file (DOS)  : OPEN15,8,15,"C:NEWFILE=OLDFILE"

• save basic program : SAVE"NAME",8

Don't ever use c1541 NEW (format) command, it is absolutly NOT supported and will lead to data loss.

https://sourceforge.net/projects/darfpga/files/Software%20VHDL/C64_and_1541_SD

Dev. place - PC display / DE10 Lite / TV set

DE10 Lite + USB host + teensy audio shield (digital audio and micro sd card slot) + SRAM on GPIO
Connexions : USB blaster, audio jack, USB keyboard, video RGB 15KHz to SCART

Impossible Mission

Xevious FPGA arcade game - MAX10 - DE10_lite - update

Xevious DE10 Lite update 

Now USB Host for USB keyboard/joystick inputs available using Arduino USB host shield. USB HID report is displayed on 7-Segments display to ease differents joysticks adaptation. Nios processor not used, simple VHDL sequencer.

Digital audio out available using Teensy audio adapter. I2C config uses VHDL sequencer.

VHDL source code available here : https://sourceforge.net/projects/darfpga/files/Software%20VHDL/xevious/

See other articles below for hardware details.

Digital audio DAC and SD card on DE10 Lite with Teensy audio shield

Teensy audio shield wired on top of USB Host arduino shield and mounted on DE10 Lite FPGA board. See wiring schematic below. Audio chip SGTL5000 allows to get audio output on headphone plug from FPGA I2S digital format. Line out may be connected by adding header. SD card is also wired.  

USB Host and audio shield on DE10 Lite

USB Host and audio shield on DE10 Lite

Audio shield on top of USB Host shield
(blue female header welded on USB Host PCB)

Audio shield on top of USB Host shield
(show 9/10 pins line in/out header holes)

 

 

Wiring of Audio shield : BEWARE First pad column are Max3421e GPIO outputs, NOTHING must be connected there !

Wiring schematic

SPI MISO, MOSI and SCLK are shared between USB Host max3421e and SD Card. They have separated chip select (CS-SD and CS-USB). Optional flash memory SPI chip select (CS-MEM) is not wired to FPGA board.

SGTL5000 config lines use I2C protocol (SDA/SCL). These lines are wired to FPGA board.

SGTL5000 digital audio I2S interface signals MCLK, LRCLK, BLCK and I2S in (TX) are wired to FPGA board.

SGTL5000 digital audio I2S out (RX) is not connected to FPGA board. Teensy board VOL pin is not wired.